Session

DescriptionMany scientific applications are expected to provide breakthroughs in science and engineering with exascale supercomputers. To this end, large parallel codes need to be mapped efficiently to complex architectures involving heterogeneous compute and memory resources, not to mention multiple levels of memory, e.g., high-bandwidth and high-capacity memories. The process of mapping processes, threads, GPU kernels, etc. efficiently to a supercomputer is complex and machine dependent. In fact, many performance workshops and tutorials in computer and computational science dedicate a significant portion of time to this problem alone, even before delving into their innovative approaches. In this minisymposium, we delve into the challenges posed by this problem together with ongoing solutions by world-class supercomputer centers and private industry. There are two challenges. First, the efficient mapping of hybrid compute abstractions (e.g., MPI+X) to the underlying hardware in a portable manner across architectures. Second, the way of expressing these mappings and their available features differ significantly from runtime system to runtime system. We will discuss promising mapping algorithms as well as mechanisms and interfaces to adequately host such algorithms portably. This minisymposium aims to foster collaborations in this area with feedback from the scientific community.