BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:Europe/Stockholm
X-LIC-LOCATION:Europe/Stockholm
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=-1SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=10;BYDAY=-1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20190719T085745Z
LOCATION:HG F 3
DTSTART;TZID=Europe/Stockholm:20190614T113000
DTEND;TZID=Europe/Stockholm:20190614T120000
UID:submissions.pasc-conference.org_PASC19_sess123_msa129@linklings.com
SUMMARY:Performance Portability in AMR: Leveraging the LLVM Compiler Infra
 structure in AMR Frameworks
DESCRIPTION:Minisymposium\nComputer Science and Applied Mathematics, Physi
 cs, Solid Earth Dynamics\n\nPerformance Portability in AMR: Leveraging the
  LLVM Compiler Infrastructure in AMR Frameworks\n\nWahib\n\nAMR frameworks
  are no exception for the performance portability challenge in HPC. Severa
 l approaches can be used for supporting an acceptable level of performance
  portability. In this talk we focus on one of those approaches: using a co
 mpiler-based approach. We leverage the capability of the LLVM compiler inf
 rastructure to support different target architectures by applying code tra
 nsformations at the level of LLVM Intermediate Representation (IR). We dis
 cuss the advantages and challenges of using this approach. We also show ho
 w we use of this approach in Daino, an AMR framework that primarily suppor
 ts GPUs, and also supports CPUs.
END:VEVENT
END:VCALENDAR