Performance Portability in AMR: Leveraging the LLVM Compiler Infrastructure in AMR Frameworks
Presenter
Event Type
Minisymposium
Computer Science and Applied Mathematics
Physics
Solid Earth Dynamics
TimeFriday, 14 June 201911:30 - 12:00
LocationHG F 3
DescriptionAMR frameworks are no exception for the performance portability challenge in HPC. Several approaches can be used for supporting an acceptable level of performance portability. In this talk we focus on one of those approaches: using a compiler-based approach. We leverage the capability of the LLVM compiler infrastructure to support different target architectures by applying code transformations at the level of LLVM Intermediate Representation (IR). We discuss the advantages and challenges of using this approach. We also show how we use of this approach in Daino, an AMR framework that primarily supports GPUs, and also supports CPUs.